Full time
Yoh A Day & Zimmerman Company
Santa Clara, CA, USA
RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background in supporting RISC-V houses. The primary technology will be focused around SOCs that are built around ML Accelerators. This person should have a solid background in RTL Design and also have an understanding of verification flows. This person should be a strong engineer and be able to come in and provide solid and consistent support with minimal hand holding or guidance. Required 7+ Years of RTL Design experience. Strong Verilog experience. Debug RTL/logic issues across various hierarchies (core, chip) in both pre-silicon and post-silicon environment. Environment will be pre-silicon. Develop RTL as well as understand verification flows. Understanding of SOC's that are built around machine learning accelerators. Experience working out of companies such as - Groq, Nvidia, AMD, MAYBE Intel, etc. Pluses: RISC-V Experience is a plus. Degree in Electrical Engineering, Electrical...