Qualcomm
Boulder, CO, USA
General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Develop test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI, etc) . Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Develop and maintain emulation environment to collect metrics related to emulation environment. **Need to be in San Diego full time, 5 days a week Applicants selected will be subject to a government security investigation and...

